GOF 推荐参考流程

01 / CHOOSE

根据目标选择流程

目标	使用流程	主要输出
比较两个网表是否等价	Netlist vs Netlist LEC	LEC 日志与非等价点
可增加或删除标准单元的功能 ECO	PreMask ECO	ECO 报告与修改后网表
只能使用已放置 spare cells	PostMask spare-cell ECO	映射到 spare cells 的网表
使用 metal-configurable ECO cells	Gate-array ECO	映射到 gate-array cells 的网表
从 RTL 差异生成网表补丁	RTL 引导 ECO	RTL 差异对应的网表 ECO
查看网表或定位不等价	GOF Debug	交互式原理图与调试会话

02 / PREPARE

运行前替换这些项目

标准单元、SRAM 和模拟宏的 Liberty 文件路径。
Reference 与 Implementation 网表或 RTL file list。
set_top 中的真实顶层模块名。
scan、test mode、clock/reset 等项目约束。
PostMask 流程所需的 DEF、LEF 和 spare-cell 命名规则。
输出文件名与可写目录。

约束必须按项目复核。 示例中的 scan_out*、scan_enable 和 scan_mode 只是常见写法，不能直接代表您的 DFT 结构。

03 / LOGIC EQUIVALENCE

Netlist vs Netlist LEC

LEC

比较综合网表与实现网表

读取库和两份网表，设置顶层及测试约束，然后执行逻辑等价性检查。

goflec.pl · 运行：gof -run goflec.plPerl

use strict;

set_log_file("goflec.log");

# read libraries
read_library("stdcell.lib");
read_library("sram.lib");
read_library("analog.lib");

# read ref. netlist
read_design("-ref", "top_syn.v");

# read imp. netlist
read_design("-imp", "top_pr.v");

# set top module
set_top("top_module_name");

# bypass test mode if exists
set_ignore_output("scan_out*");
set_pin_constant("scan_enable", 0);
set_pin_constant("scan_mode", 0);

# Optional: Phase inversion detection is disabled by default.
# set_mapping_method("-phase");

run_lec();

04 / FULL LAYERS ECO

PreMask 功能 ECO

ECO

允许增加、删除或替换标准单元

fix_design 比较 Reference 与 Implementation，生成补丁；随后报告并写出结果。

gofeco.pl · 运行：gof -run gofeco.plPerl

use strict;

set_log_file("gofeco_premask.log");

# read libraries
read_library("stdcell.lib");
read_library("sram.lib");
read_library("analog.lib");

# read ref. netlist
read_design("-ref", "top_syn.v");

# read imp. netlist
read_design("-imp", "top_pr.v");

# set top module
set_top("top_module_name");

# bypass test mode if exists
set_ignore_output("scan_out*");
set_pin_constant("scan_enable", 0);
set_pin_constant("scan_mode", 0);

# eco
fix_design();

# report and write result
report_eco();
write_verilog("top_pr_eco.v");

05 / METAL-ONLY ECO

PostMask ECO：映射到 spare cells

SPR

先生成逻辑补丁，再映射到已放置备用单元

DEF 提供物理位置；get_spare_cells 选择可用实例；map_spare_cells 完成映射。

gofeco_spare.pl · 运行：gof -run gofeco_spare.plPerl

use strict;

set_log_file("gofeco_postmask.log");

# read libraries
read_library("stdcell.lib");
read_library("sram.lib");
read_library("analog.lib");

# read ref. netlist
read_design("-ref", "top_syn.v");

# read imp. netlist
read_design("-imp", "top_pr.v");

# set top module
set_top("top_module_name");

# bypass test mode if exists
set_ignore_output("scan_out*");
set_pin_constant("scan_enable", 0);
set_pin_constant("scan_mode", 0);

# premask eco
fix_design();
report_eco();

# postmask eco
read_def("top.def");
get_spare_cells("spr_1/spr_gate*");
map_spare_cells();
report_eco();

# report and write result
write_verilog("top_pr_eco.v");

06 / GATE ARRAY ECO

PostMask ECO：映射到 metal-configurable cells

GA

加载 ECO cell 的 Liberty、LEF 与 DEF

名称前缀取决于库。本例使用 G* 和 GFILL*，实际项目必须按库单元名修改。

gofeco_gate_array.pl · 运行：gof -run gofeco_gate_array.plPerl

use strict;

set_log_file("gofeco_gate_array.log");

# read libraries
read_library("stdcell.lib");
read_library("ecocell.lib"); # this lib contains gate-array functional cells and fillers
read_library("sram.lib");
read_library("analog.lib");

# read ref. netlist
read_design("-ref", "top_syn.v");

# read imp. netlist; include gate-array fillers
read_design("-imp", "top_pr_with_gfill.v");

# set top module
set_top("top_module_name");

# bypass test mode if exists
set_ignore_output("scan_out*");
set_pin_constant("scan_enable", 0);
set_pin_constant("scan_mode", 0);

# premask eco
fix_design();
report_eco();

# postmask eco: read physical data
read_lef("tech.lef");
read_lef("stdcell.lef");
read_lef("ecocell.lef");
read_def("top.def");

# G and GFILL are example prefixes; change them to match your library.
get_spare_cells(
    "-gate_array", "G*",
    "-gate_array_filler", "GFILL*"
);
map_spare_cells();
report_eco();

# report and write result
write_verilog("top_pr_eco.v");

07 / RTL-GUIDED ECO

RTL 引导 ECO（无需重新综合完整设计）

RTL

先比较旧、新 RTL，再把差异应用到旧网表

该流程需要支持 RTL 功能的软件包；CentOS 6 兼容版本不支持。

gofeco_rtl_guided.pl · 运行：gof -run gofeco_rtl_guided.plPerl

use strict;

set_log_file("gofeco_rtl_guided.log");

# read libraries
read_library("-f", "all_liberty.flist");
# all_liberty.flist 示例：
# -lib stdcell.lib
# -lib sram.lib
# -lib analog.lib

set_define("SYN");
set_define("ABC", "1");

# read and compare old/new RTL
read_rtl("-ref", "-f", "rtl_old/rtl.flist");
read_rtl("-imp", "-f", "rtl_new/rtl.flist");
set_top("top");
rtl_compare();

# read old prelayout netlist
read_design("-imp", "top_syn_old.v");
set_top("top");

# generate ECO
fix_design();

# report and write result
report_eco();
write_verilog("top_syn_eco.v");

08 / DEBUG

单网表与双网表 Debug

1×

单网表原理图调试

适合浏览设计、跟踪信号和进行交互式 GUI ECO。

gofdebug_single.plPerl

use strict;

set_log_file("gofdebug.log");

# read libraries
read_library("stdcell.lib");
read_library("sram.lib");
read_library("analog.lib");

# read netlist
read_design("top_netlist.v");

# set top module
set_top("top_module_name");

# start GUI
start_gui();

2×

双网表 LEC / ECO 失败调试

先执行 LEC，再在 GUI 中查看非等价点及相关逻辑。

gofdebug_lec.plPerl

use strict;

set_log_file("gofdebug_lec.log");

# read libraries
read_library("stdcell.lib");
read_library("sram.lib");
read_library("analog.lib");

# read ref. netlist
read_design("-ref", "top_syn.v");

# read imp. netlist
read_design("-imp", "top_pr.v");

# set top module
set_top("top_module_name");

# bypass test mode if exists
set_ignore_output("scan_out*");
set_pin_constant("scan_enable", 0);
set_pin_constant("scan_mode", 0);

# run LEC before opening GUI
run_lec();
start_gui();

09 / SIGNOFF HELP

生成 Formality 辅助文件

在 ECO 或 LEC 脚本完成映射后，写出 compare points 和 Formality 辅助文件。参数可以包含目录和基础名称。

加入 GOF 脚本末尾Perl

# ... ECO 或 LEC 主流程
run_lec();

write_compare_points("gof_compare_points.rpt");
write_formality_help_files("fm_help/eco_1225");

GOF 会在指定目录生成辅助文件。请使用实际生成的 *.config.tcl 文件名，并在 Formality 的 match 之前加载。

Formality signoff 脚本片段Tcl

read_db ...

read_verilog -r -05 { reference.v }
set_top r:/WORK/top

read_verilog -i -05 { implementation_eco.v }
set_top i:/WORK/top

# 项目的 DFT 与常量约束

source -echo -verbose fm_help/eco_1225.config.tcl

match
verify

先确认生成文件名。 GOF 版本和输出选项可能影响文件列表；以运行目录中的实际输出为准，不要照抄旧示例中的日期文件名。

选择目标，替换输入，运行 GOF。